Method and apparatus to use embedded patterns and s-parameters of a small phased array to build large phased arrays

ABSTRACT

To model a phased array antenna having a target array of antenna elements, a small array of antenna elements is selected that has fewer antenna elements than the target array. For each antenna element of the small array of antenna elements, far field patterns are captured for a plurality of signal frequencies. S-parameters for the small array of antenna elements are captured for the plurality of signal frequencies. The far field patterns captured for the antenna elements of the small array are mapped to antenna elements of the target array of antenna elements. The S-parameters captured for the small array are mapped to the target array.

BACKGROUND

Phased array antennas, typically composed of multiple antenna elementsarranged in an array formation, are often used for directional sendingand receiving of data. To send signals, phased array antennas achievebeam forming by adding together radiation patterns from each antennaelements to concentrate energy into a narrow beam of radiation.Typically, phase shifters and attenuators are used to generate radiationpatterns from each phased array antenna that will interfere with eachother constructively and destructively to achieve the desired radiationbeam. Phase shifters and attenuators are likewise also used to receiveradiation beams and reconstruct the originally sent signal.

When designing for manufacture a phased array antenna, modeling of adesign is often used to model a design to detect how the phased arrayantenna will perform. Modeling often includes predicting far fieldpatterns that will be created by the phased array antenna, as well asscattering parameters (S-parameters) for the phased array antenna. Thecomplexity of this modeling can increase exponentially with the numberof antenna elements. For a phased array antenna with more than a veryfew antenna elements accurate modeling is not possible without verysophisticated software tools that require significant processingresources. One such software tool is Pathwave EM Design (EMPro) softwareavailable from Keysight Technologies, 1400 Fountaingrove Parkway, SantaRose, Calif. 95403.

As the number of antenna elements increase, the processing power toperform accurate modeling quickly overpowers any processing capability,so that direct modeling becomes impossible and approximations must beused for modeling and/or testing of prototypes are used to determineperformance of designs.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a simplified block diagram of a phased array antenna.

FIG. 2 is a flowchart illustrating a simplified manufacturing process,from design to production, of a phased array antenna.

FIG. 3 shows a simplified pattern of a phased array antenna to bemanufactured.

FIG. 4 shows a pattern for a reduced-sized phased array antenna used tomodel performance of the phased array antenna shown in FIG. 3.

FIG. 5 is a flowchart illustrating a process utilized to model thephased array antenna shown in FIG. 3 based on an extrapolation of themodeling the phased array antenna shown in FIG. 4.

FIG. 6 shows a simplified pattern of a phased array antenna thatillustrates the process shown in FIG. 5.

FIG. 7, FIG. 8 and FIG. 9 show highlighted sections illustratingselected ports of a phased array antenna to illustrate the process shownin FIG. 5

DETAILED DESCRIPTION

FIG. 1 is a simplified block diagram of a phased array antenna 10.Phased array antenna 10 is composed of an 8×8 array of antenna elements.In FIG. 1 the antenna elements are separated into four antenna tiles,each with a 4×4 array of antenna elements. For example, an antenna tile11 has a 4×4 array of antenna elements 16. An antenna tile 12 has a 4×4array of antenna elements 17. An antenna tile 13 has a 4×4 array ofantenna elements 18. An antenna tile 14 has a 4×4 array of antennaelements 19.

While phased array antenna 10 has four antenna tiles of 16 antennaelements, phased array antennas can include hundreds or thousands ormore antenna elements divided into any number of antenna tiles. Further,while FIG. 1 shows square antenna elements arranged on square tiles,antenna elements and antenna tiles can have any shape and any sizedepending on the antenna characteristics desired for a particularapplication. The small number, simple shapes and simple arrangements ofantenna elements are shown in FIG. 1 to aid in describing operationsthat increase exponentially in complexity with the increasing number ofantenna elements. This simplification of size and arrangement of phasedarray antenna 10 in FIG. 1 allows a full explanation of the principlesof operation that can be applied by a person of ordinary skill of theart to phased array antennas of any size and shape.

FIG. 2 is a flowchart illustrating a simplified manufacturing process,from design to production, of phased array antenna 10. In a block 21 theprocess starts. In a block 22, phase array antenna 10 is designed. In ablock 23, the design for phase array 10 is modeled and tested. Asoftware tool such as Pathwave EM Design (EMPro) software is typicallyused in the modeling. Design and testing is typically an interactiveprocess where after modeling, design changes are made and modeling isperformed on the revised design. Eventually the projected performance ofthe design is sufficiently satisfactory to move onto prototyping forfurther testing. Block 24 represents the decision point where aftermodeling a design is approved for prototyping or where further designrevisions are sought.

Fabrication block 25 represents the point where a prototype is built andtested. This can be an iterative process in that if the prototype doesnot perform satisfactorily further design revisions are required. Block26 represents the decision point where after fabrication, a prototype isapproved for manufacturing or where further design revisions are sought.Since fabrication is significantly more expensive than modeling, costsare effectively reduced where modeling can most accurately predictperformance of prototypes thereby avoiding redesigning after the initialfabrication block 25, or at least minimizing the times the product mustbe prototyped.

When a prototype performs satisfactorily, in a block 27, the design isreleased for manufacture, and the product is manufactured and placedinto service.

FIG. 3 shows an 8×8 array pattern 30 used in the modeling of phasedarray antenna 10. The antenna elements in array pattern 30 are numberedfrom 1 to 64.

FIG. 4 shows a 5×5 array 40 also used in the modeling of phased arrayantenna 10. The antenna elements in array pattern 40 are numbered from 1to 25.

FIG. 5 is a flowchart illustrating a process utilized to model thephased array antenna 10 using the array pattern shown in FIG. 3 based onan extrapolation of the modeling of phased array antenna 40 shown inFIG. 4.

In a block 50, the process starts. In a block 51, for a phased arrayantenna of M rows and N columns arranged as an M×N array, where M and Nare any integer number, a smaller phased array antenna of size m rows byn columns (where m and n are odd integers) arranged as an m×n array isconstructed and simulated in an electromagnetic (EM) simulator. Eachantenna element can be of any size or shape. A commercially available EMsimulator such as Pathwave EM Design (EMPro) software can be used tosimulate the performance of the phased array simulator.

For the example illustrated by FIG. 3 and FIG. 4, the phased arrayantenna is 8×8 and the smaller phased array antenna is 5×5. This is asimplified example, as the phased array antenna to be modeled cantypically be 64×64 or larger which may require too many calculations andtoo much data to be directly modeled by a commercially available EMsimulator.

In a block 52, the far field embedded patterns of all the m*n antennaelements are captured into individual files at all the desiredfrequencies. An embedded pattern of an element is one where only thatelement is excited while all other elements are terminated in a 50 ohmimpedance. The locations of the antenna elements are also captured as X,Y, Z coordinates.

For the example illustrated by FIG. 3 and FIG. 4, this means that thefar field patterns at all desired frequencies are captured for each ofthe twenty-five antenna elements of array 40. The locations of theantenna elements in twenty-five element array 40 are also captured as X,Y, Z coordinates.

Input to the EM simulator will typically include geometry of the antennaelements, arrangement of the antenna elements, spacing between theantenna elements, and properties of the materials from which the antennaelements are composed. The outputs from the EM simulator defining thefar field patterns include, for example, energy distribution, noise,gain efficiency throughout three dimensional space and so on.

In a block 53, the S-parameters are captured from the EM simulator forthe m×n array. Each antenna element of the m×n array is treated as aport for the purpose of calculating the S-parameters. The matrix ofS-parameters will have (m*n)*(m*n)S-parameter values. For 5×5 array 40,for example, the matrix of S-parameters will have (5*5)*(5*5)=625S-parameter values.

In a block 54, the far field patterns captured for the antenna elementsof the small array are mapped to the antenna elements of the targetarray, as described below. Before the start of the mapping anyadditional phase included into the captured embedded pattern of eachelement is removed. After completion of the mapping the phase dependenton the location of the element pattern in the target array is added backwhile computing the overall target array far field pattern.

The far field patterns captured for the antenna elements at the fourcorners of the small array are mapped to the corner antenna elements ofthe target array.

The four outside edges of the small array are mapped to the four outsideedges of the target array. For the mapping, starting from the corners,each of the far field pattern files for antenna elements along each edgeof the small array is mapped only once into antenna elements along acorresponding edge of the target array, except for the far field patternfile for the middle antenna element of each edge of the small array,which is repeatedly mapped to all the remaining middle antenna elementsof the corresponding edge of the target array.

Once far field patterns from antenna elements of the four outside edgesof the small array are mapped to antenna elements of the four outsideedges of the target array, antenna elements at the ends of each row ofthe target array will already have far field patterns from the smallarray mapped into them. For the remaining antenna elements in each rowof the target array, the row of the small array that has the same farfield pattern files at the ends of the row is used to map far fieldpatterns files into the remaining antenna elements of the correspondingrow of the target array.

For the mapping, starting from the ends of the row, each of the farfield pattern files for the row for the small array is mapped only onceinto the corresponding row of the target array, except for the far fieldpattern file for the middle antenna element of the row, which isrepeatedly mapped to all the remaining middle antenna elements of thecorresponding row of the target array.

Instead of rows, columns can be used. Each column of the target arraywill have far field pattern files mapped from the small antenna for eachof the ends of the column. For each column of the target array, thecolumn of the small array that has the same far field pattern files atthe ends of the column is used to map far field patterns files to thatcorresponding column of the target array. For the mapping, starting fromthe ends of the column, each of the far field pattern files for thecolumn for the small array is mapped only once into the target array,except for the far field pattern file for the middle antenna element ofthe column of the small array, which is repeatedly mapped to all theremaining middle antenna elements of the column of the target array.

FIG. 6 represents the results of performing this mapping of the farfield patterns captured for the antenna elements of small array 40 intothe antenna elements of target array 60.

The far field patterns captured for the antenna elements at the fourcorners of small array 40 are mapped to the four corner antenna elementsof target array 60. As shown in FIG. 60, array corners 1, 5, 21 and 25of small array 40 have been mapped into the corners of target array 60.

The four outside edges of small array 40 are mapped to the four outsideedges of target array 60. For the mapping, starting from the corners,each of the far field pattern files for small array 40 is mapped onlyonce into target array 60, except for the far field pattern file for themiddle antenna element of the edge, which is repeatedly mapped to allthe remaining middle antenna elements of target array 60. As shown inFIG. 60, the top edge (1, 2, 3, 4, 5) of small array 40 has been mappedas (1, 2, 3, 3, 3, 3, 4, 5) into the antenna elements at the top of edgeof target array 60. The left edge (1, 6, 11, 16, 21) of small array 40has been mapped as (1, 6, 11, 11, 11, 11, 16, 21) into the antennaelements on the left of edge of target array 60. And so on.

Now each row of target array 60 will have far field pattern files mappedfrom the small antenna for each of the ends of the row. For each row oftarget array 60, the row of small array 40 that has the same far fieldpattern files at the ends of the row is used to map far field patternsfiles to that row of target array 60. For the mapping, starting from theends of the row, each of the far field pattern files for the row forsmall array 40 is mapped only once into target array 60, except for thefar field pattern file for the middle antenna element of the row, whichis repeatedly mapped to all the remaining middle antenna elements of therow of target array 60. For example, as shown in in FIG. 60, the row (6,7, 8, 9, 10) of small array 40 has been mapped as (6, 7, 8, 8, 8, 8, 9,10) in target array 60. Likewise, the row (16, 17, 18, 19, 20) of smallarray 40 has been mapped as (16, 17, 18, 18, 18, 18, 19, 20) in targetarray 60. The row (11, 12, 13, 14, 15) of small array 40 has been mappedinto several rows in target array 60 as (11, 12, 13, 13, 13, 13, 14,15).

Likewise, for each column of target array 60, the column of small array40 that has the same far field pattern files at the ends of the columnto a column of target array 60. For the mapping, starting from the endsof the column, each of the far field pattern files for the column forsmall array 40 is mapped only once into target array 60, except for thefar field pattern file for the middle antenna element of the column,which is repeatedly mapped to all the remaining middle antenna elementsof the column of target array 60. For example, as shown in in FIG. 60,the column (2, 7, 12, 17, 22) of small array 40 has been mapped as (2,7, 12, 12, 12, 12, 17, 22) in target array 60. Likewise, the column (4,9, 14, 19, 24) of small array 40 has been mapped as (4, 9, 14, 14, 14,14, 19, 24) in target array 60. The column (3, 8, 13, 18, 23) of smallarray 40 has been mapped into several columns in target array 60 as (3,8, 13, 13, 13, 13, 18, 23).

In a block 55, S-parameters of the small array are mapped to the targetarray. For the calculation of S-parameters each antenna element isregarded as a port. In the mapping, the matrix of S-parameters saved inblock 53 is mapped onto the larger array. For each port of the targetarray, the small array is first laid over the target array so that theport of the target array is aligned with a corresponding port of thesmall array. Then two-port S-parameters for the corresponding port (as afirst port for the two-port S-parameter) of the small array and each ofthe ports (as a second port for the two-port S-parameter) of the smallarray are copied as S-parameters for the target array where the smallarray overlays the target array. Where the small array does not overlaythe target array a zero or another minimal value issued for two-portS-parameter values for the corresponding port (as a first port for thetwo-port S-parameter) and each of the ports (as a second port for thetwo-port S-parameter) of the target array where the small array does notoverlay the target array.

The alignment of each port of the target array with a corresponding portof the small array is performed to make sure each port of the targetarray uses values from the port of the small array that has the mostsimilar surrounding ports. To arrive at the correct alignment, for eachselected port of the target array, the small array is aligned so thatthe middle port of the small array is aligned over the selected port andthen if any of the ports of the small array is located outside theboundaries of the target array, a location of the small array is shifteduntil the small array is completely within the large array.

As a result of using the above methodology, the corner ports of thesmall array are aligned directly to corresponding corner ports of thetarget array.

Also, ports along outside edges of the small array are aligned to portsalong corresponding outside edges of the target array so that along eachedge starting from corners of the edge, each port of the edge of thesmall array is aligned only once into a corresponding port of thecorresponding edge of the target array, except for a middle port of theedge of the small array which is aligned into all remaining ports of thecorresponding edge of the target array.

Likewise, along each row of the target array, each port of the row ofthe small array is aligned only once into a corresponding port of thecorresponding row of the target array, except for a middle port of therow of the small array which is aligned into all remaining ports of thecorresponding row of the target array,

-   -   wherein each row of the target array corresponds to a row of the        small array when end row ports from the small array have already        been mapped into row end ports of the corresponding target        array.

Also, along each column of the target array, each port of the column ofthe small array is aligned only once into a corresponding port of thecorresponding column of the target array, except for a middle port ofthe column of the small array which is aligned into all remaining portsof the corresponding column of the target array, wherein each column ofthe target array corresponds to a column of the small array when endcolumn ports from the small array have already been mapped into columnend ports of the corresponding target array.

For the example using 8×8 array 30 shown in FIG. 3 as the target arrayand 5×5 array 40 shown in FIG. 4 as the small array, FIG. 6 gives theport of 5×5 array 40 that is to be arrayed with each port of 8×8 array30.

For example, port 1 of 8×8 array 30 is aligned with port 1 of 5×5 array40, as shown by the array in FIG. 6. Likewise, port 2 of 8×8 array 30 isaligned with port 2 of 5×5 array 40, as shown by the array in FIG. 6.Likewise, port 3 of 8×8 array 30 is aligned with port 3 of 5×5 array 40,as shown by the array in FIG. 6. Likewise, port 4 of 8×8 array 30 isaligned with port 3 of 5×5 array 40, as shown by the array in FIG. 6.Likewise, port 5 of 8×8 array 30 is aligned with port 3 of 5×5 array 40,as shown by the array in FIG. 6. Likewise, port 9 of 8×8 array 30 isaligned with port 6 of 5×5 array 40, as shown by the array in FIG. 6.Likewise, port 10 of 8×8 array 30 is aligned with port 7 of 5×5 array40, as shown by the array in FIG. 6. Likewise, port 27 of 8×8 array 30is aligned with port 13 of 5×5 array 40, as shown by the array in FIG.6. And so on.

In FIG. 7, box 71 highlights where 5×5 array 40 overlays 8×8 array 30for port 1 of 8×8 array 30. In FIG. 7 the locations of element/ports of5×5 array 40 are numbered using parenthesis as (1), (2), . . . , (25)while the locations of element/ports of 8×8 array 30 are numberedwithout parenthesis as 1, 2, . . . , 64.

For port 1 of 5×5 array 40 there are twenty-five S-parameters: (1,1),(1,2), (1,3) . . . (1,25). For port 1 of 8×8 array 30 there aresixty-four S-parameters: (1,1), (1,2), (1,3) . . . (1,64). Where portsof 5×5 array 40 overlap the ports of 8×8 array 30, the correspondingS-parameters of 5×5 array 40 are used for the ports of 8×8 array 30.Thus, S-parameters for ports (1,1) . . . (1,5) of 5×5 array 40 are usedrespectively as S-parameters for ports (1,1) . . . (1,5) of 8×8 array30. The S-parameters for ports (1,6) . . . (1,10) of 5×5 array 40 areused respectively as S-parameters for ports (1,9) . . . (1,13) of 8×8array 30. The S-parameters for ports (1,11) . . . (1,15) of 5×5 array 40are used respectively as S-parameters for ports (1,17) . . . (1,21) of8×8 array 30. The S-parameters for ports (1,16) . . . (1,20) of 5×5array 40 are used respectively as S-parameters for ports (1,25) . . .(1,29) of 8×8 array 30. The S-parameters for ports (1,21) . . . (1,25)of 5×5 array 40 are used respectively as S-parameters for ports (1,33) .. . (1,37) of 8×8 array 30. All the other parameters for port 1 of 8×8array 30 are assigned the value of zero or some other minimal value.

In FIG. 8, box 81 highlights where 5×5 array 40 overlays 8×8 array 30for port 25 of 8×8 array 30. Port 11 of 5×5 array 40 is aligned withport 25 of 8×8 array 30. Where ports of 5×5 array 40 overlap the portsof 8×8 array 30, the corresponding S-parameter 5×5 array 40 are copiedto the ports of 8×8 array 30. Thus, S-parameters for ports (11,1) . . .(11,5) of 5×5 array 40 are used respectively as S-parameters for ports(25,9) . . . (25,13) of 8×8 array 30. The S-parameters for ports (11,6). . . (11,10) of 5×5 array 40 are used respectively as S-parameters forports (25,17) . . . (25,21) of 8×8 array 30. The S-parameters for ports(11,11) . . . (11,15) of 5×5 array 40 are used respectively asS-parameters for ports (25,25) . . . (25,29) of 8×8 array 30. TheS-parameters for ports (11,16) . . . (11,20) of 5×5 array 40 are usedrespectively as S-parameters for ports (25,33) . . . (25,37) of 8×8array 30. The S-parameters for ports (11,21) . . . (11,25) of 5×5 array40 are used respectively as S-parameters for ports (25,41) . . . (25,45)of 8×8 array 30. All the other parameters for port 25 of 8×8 array 30are assigned the value of zero or some other minimal value.

In FIG. 9, box 91 highlights where 5×5 array 40 overlays 8×8 array 30for port 28 of 8×8 array 30. Port 13 of 5×5 array 40 is aligned withport 28 of 8×8 array 30. Where ports of 5×5 array 40 overlap the portsof 8×8 array 30, the corresponding S-parameter 5×5 array 40 are copiedto the ports of 8×8 array 30. Thus, S-parameters for ports (13,1) . . .(13,5) of 5×5 array 40 are used respectively as S-parameters for ports(28,10) . . . (28,14) of 8×8 array 30. The S-parameters for ports (13,6). . . (13,10) of 5×5 array 40 are used respectively as S-parameters forports (28,18) . . . (28,22) of 8×8 array 30. The S-parameters for ports(13,11) . . . (13,15) of 5×5 array 40 are used respectively asS-parameters for ports (28,26) . . . (28,30) of 8×8 array 30. TheS-parameters for ports (13,16) . . . (13,20) of 5×5 array 40 are usedrespectively as S-parameters for ports (28,34) . . . (28,38) of 8×8array 30. The S-parameters for ports (13,21) . . . (13,25) of 5×5 array40 are used respectively as S-parameters for ports (28,42) . . . (28,46)of 8×8 array 30. All the other parameters for port 25 of 8×8 array 30are assigned the value of zero or some other minimal value.

While the foregoing written description of the invention enables one ofordinary skill to make and use what is considered presently to be thebest mode thereof, those of ordinary skill will understand andappreciate the existence of variations, combinations, and equivalents ofthe specific embodiment, method, and examples herein. The inventionshould therefore not be limited by the above described embodiment,method, and examples, but by all embodiments and methods within thescope and spirit of the invention as claimed.

1. A method for manufacturing a phased array antenna, comprising:designing a proposed phased array antenna having a target array ofantenna elements; modeling the proposed phased array antenna, including:selecting a small array of antenna elements wherein the small array hasfewer antenna elements than the target array, for each antenna elementof the small array of antenna elements, capturing far field patterns fora plurality of signal frequencies, capturing S-parameters for the smallarray of antenna elements for the plurality of signal frequencies, whereeach antenna element in the small array is regarded as a port whencapturing the S-parameters for the small array, mapping the far fieldpatterns captured for the antenna elements of the small array to antennaelements of the target array of antenna elements, and mapping theS-parameters captured for the small array to the target array, whereeach antenna element in the target array is regarded as a port whenmapping the S-parameters to the target array; and upon obtainingsatisfactory results from modeling the proposed phased array antenna,physically building the proposed phased array antenna.
 2. A method as inclaim 1 wherein mapping the far field patterns captured for the antennaelements of the small array to antenna elements of the target array ofantenna elements includes: mapping far field patterns for corner antennaelements of the small array directly to corresponding corner antennaelements of the target array; and mapping far field patterns of theantenna elements along outside edges of the small array to antennaelements along corresponding outside edges of the target array,including: along each edge starting from corners of the edge, mappingfar field patterns for each antenna element of the edge of the smallarray only once into a corresponding antenna element of thecorresponding edge of the target array, except for a middle antennaelement of the edge of the small array which is mapped into allremaining antenna elements of the corresponding edge of the targetarray.
 3. A method as in claim 1 wherein mapping the far field patternscaptured for the antenna elements of the small array to antenna elementsof the target array of antenna elements includes: mapping far fieldpatterns for corner antenna elements of the small array directly tocorresponding corner antenna elements of the target array; mapping farfield patterns of the antenna elements along outside edges of the smallarray to antenna elements along corresponding outside edges of thetarget array, including: along each edge of the target array, startingfrom corners of the edge, mapping far field patterns for each antennaelement of the edge of the small array only once into a correspondingantenna element of a corresponding edge of the target array, except fora middle antenna element of the edge of the small array which is mappedinto all remaining antenna elements of the corresponding edge of thetarget array; and mapping far field patterns of the antenna elements inrows of the small array to antenna elements in rows of the target array,including: along each row of the target array, mapping far fieldpatterns for each antenna element of the row of the small array onlyonce into a corresponding antenna element of the corresponding row ofthe target array, except for a middle antenna element of the row of thesmall array which is mapped into all remaining antenna elements of thecorresponding row of the target array, wherein each row of the targetarray corresponds to a row of the small array when end row antennaelements from the small array have already been mapped into row endantenna elements of the corresponding target array.
 4. A method as inclaim 1 wherein mapping the far field patterns captured for the antennaelements of the small array to antenna elements of the target array ofantenna elements includes: mapping far field patterns for corner antennaelements of the small array directly to corresponding corner antennaelements of the target array; mapping far field patterns of the antennaelements along outside edges of the small array to antenna elementsalong corresponding outside edges of the target array, including: alongeach edge of the target array, starting from corners of the edge,mapping far field patterns for each antenna element of the edge of thesmall array only once into a corresponding antenna element of acorresponding edge of the target array, except for a middle antennaelement of the edge of the small array which is mapped into allremaining antenna elements of the corresponding edge of the targetarray; and mapping far field patterns of the antenna elements in columnsof the small array to antenna elements in columns of the target array,including: along each column of the target array, mapping far fieldpatterns for each antenna element of the column of the small array onlyonce into a corresponding antenna element of the corresponding column ofthe target array, except for a middle antenna element of the column ofthe small array which is mapped into all remaining antenna elements ofthe corresponding column of the target array, wherein each column of thetarget array corresponds to a column of the small array when end columnantenna elements from the small array have already been mapped intocolumn end antenna elements of the corresponding target array.
 5. Amethod as in claim 1 wherein mapping the S-parameters captured for thesmall array to the target array includes: for each port of the targetarray, laying the small array over the target array so that the port ofthe target array is aligned with a corresponding port of the small arrayand performing the following; copying two-port S-parameters for thecorresponding port (as a first port for the two-port S-parameter) of thesmall array and each of the ports (as a second port for the two-portS-parameter) of the small array as S-parameters for the target arraywhere the small array overlays the target array, and using a zero oranother minimal value for two-port S-parameter values for thecorresponding port (as a first port for the two-port S-parameter) andeach of the ports (as a second port for the two-port S-parameter) of thetarget array where the small array does not overlay the target array. 6.A method as in claim 5 wherein the port of the target array is alignedwith the corresponding port of the small array in accordance with thefollowing: aligning corner ports of the small array directly tocorresponding corner ports of the target array; and aligning ports alongoutside edges of the small array to ports along corresponding outsideedges of the target array, including: along each edge starting fromcorners of the edge, aligning each port of the edge of the small arrayonly once into a corresponding port of the corresponding edge of thetarget array, except for a middle port of the edge of the small arraywhich is aligned into all remaining ports of the corresponding edge ofthe target array.
 7. A method as in claim 5 wherein the port of thetarget array is aligned with the corresponding port of the small arrayin accordance with the following: aligning corner ports of the smallarray directly to corresponding corner ports of the target array;aligning ports along outside edges of the small array to ports alongcorresponding outside edges of the target array, including: along eachedge starting from corners of the edge, aligning each port of the edgeof the small array only once into a corresponding port of thecorresponding edge of the target array, except for a middle port of theedge of the small array which is aligned into all remaining ports of thecorresponding edge of the target array; and aligning ports in rows ofthe small array to ports in corresponding rows of the target array,including: along each row of the target array, aligning each port of therow of the small array only once into a corresponding port of thecorresponding row of the target array, except for a middle port of therow of the small array which is aligned into all remaining ports of thecorresponding row of the target array, wherein each row of the targetarray corresponds to a row of the small array when end row ports fromthe small array have already been mapped into row end ports of thecorresponding target array.
 8. A method as in claim 5 wherein the portof the target array is aligned with the corresponding port of the smallarray in accordance with the following: aligning corner ports of thesmall array directly to corresponding corner ports of the target array;aligning ports along outside edges of the small array to ports alongcorresponding outside edges of the target array, including: along eachedge starting from corners of the edge, aligning each port of the edgeof the small array only once into a corresponding port of thecorresponding edge of the target array, except for a middle port of theedge of the small array which is aligned into all remaining ports of thecorresponding edge of the target array; and aligning ports in columns ofthe small array to ports in corresponding columns of the target array,including: along each column of the target array, aligning each port ofthe column of the small array only once into a corresponding port of thecorresponding column of the target array, except for a middle port ofthe column of the small array which is mapped into all remaining portsof the corresponding column of the target array, wherein each column ofthe target array corresponds to a column of the small array when endcolumn ports from the small array have already been mapped into columnend ports of the corresponding target array.
 9. A method as in claim 5wherein each port of the target array is aligned with the correspondingport of the small array so that a middle of the small array is alignedover the port and if any of the ports of the small array are locatedoutside edges of the target array, a location of the small array isshifted until the small array is completely within the large array. 10.A method as in claim 1 wherein the small array has an odd number of rowsand an odd number of columns.
 11. A method for modeling a phased arrayantenna having a target array of antenna elements, comprising: selectinga small array of antenna elements wherein the small array has fewerantenna elements than the target array; for each antenna element of thesmall array of antenna elements, capturing far field patterns for aplurality of signal frequencies; capturing S-parameters for the smallarray of antenna elements for the plurality of signal frequencies, whereeach antenna element in the small array is regarded as a port whencapturing the S-parameters for the small array; mapping the far fieldpatterns captured for the antenna elements of the small array to antennaelements of the target array of antenna elements; and mapping theS-parameters captured for the small array to the target array, whereeach antenna element in the target array is regarded as a port whenmapping the S-parameters to the target array.
 12. A method as in claim11 wherein mapping the far field patterns captured for the antennaelements of the small array to antenna elements of the target array ofantenna elements includes: mapping far field patterns for corner antennaelements of the small array directly to corresponding corner antennaelements of the target array; mapping far field patterns of the antennaelements along outside edges of the small array to antenna elementsalong corresponding outside edges of the target array, including: alongeach edge starting from corners of the edge, mapping far field patternsfor each antenna element of the edge of the small array only once into acorresponding antenna element of the corresponding edge of the targetarray, except for a middle antenna element of the edge of the smallarray which is mapped into all remaining antenna elements of thecorresponding edge of the target array.
 13. A method as in claim 11wherein mapping the far field patterns captured for the antenna elementsof the small array to antenna elements of the target array of antennaelements includes: mapping far field patterns for corner antennaelements of the small array directly to corresponding corner antennaelements of the target array; mapping far field patterns of the antennaelements along outside edges of the small array to antenna elementsalong corresponding outside edges of the target array, including: alongeach edge of the target array, starting from corners of the edge,mapping far field patterns for each antenna element of the edge of thesmall array only once into a corresponding antenna element of acorresponding edge of the target array, except for a middle antennaelement of the edge of the small array which is mapped into allremaining antenna elements of the corresponding edge of the targetarray; and mapping far field patterns of the antenna elements in rows ofthe small array to antenna elements in rows of the target array,including: along each row of the target array, mapping far fieldpatterns for each antenna element of the row of the small array onlyonce into a corresponding antenna element of the corresponding row ofthe target array, except for a middle antenna element of the row of thesmall array which is mapped into all remaining antenna elements of thecorresponding row of the target array, wherein each row of the targetarray corresponds to a row of the small array when end row antennaelements from the small array have already been mapped into row endantenna elements of the corresponding target array.
 14. A method as inclaim 11 wherein mapping the far field patterns captured for the antennaelements of the small array to antenna elements of the target array ofantenna elements includes: mapping far field patterns for corner antennaelements of the small array directly to corresponding corner antennaelements of the target array; mapping far field patterns of the antennaelements along outside edges of the small array to antenna elementsalong corresponding outside edges of the target array, including: alongeach edge of the target array, starting from corners of the edge,mapping far field patterns for each antenna element of the edge of thesmall array only once into a corresponding antenna element of acorresponding edge of the target array, except for a middle antennaelement of the edge of the small array which is mapped into allremaining antenna elements of the corresponding edge of the targetarray; and mapping far field patterns of the antenna elements in columnsof the small array to antenna elements in columns of the target array,including: along each column of the target array, mapping far fieldpatterns for each antenna element of the column of the small array onlyonce into a corresponding antenna element of the corresponding column ofthe target array, except for a middle antenna element of the column ofthe small array which is mapped into all remaining antenna elements ofthe corresponding column of the target array, wherein each column of thetarget array corresponds to a column of the small array when end columnantenna elements from the small array have already been mapped intocolumn end antenna elements of the corresponding target array.
 15. Amethod as in claim 11 wherein mapping the S-parameters captured for thesmall array to the target array includes: for each port of the targetarray, laying the small array over the target array so that the port ofthe target array is aligned with a corresponding port of the small arrayand performing the following; copying two-port S-parameters for thecorresponding port (as a first port for the two-port S-parameter) of thesmall array and each of the ports (as a second port for the two-portS-parameter) of the small array as S-parameters for the target arraywhere the small array overlays the target array, and using a zero oranother minimal value for two-port S-parameter values for thecorresponding port, (as a first port for the two-port S-parameter) andeach of the ports (as a second port for the two-port S-parameter) of thetarget array where the small array does not overlay the target array.16. A method as in claim 15 wherein the port of the target array isaligned with the corresponding port of the small array in accordancewith the following: aligning corner ports of the small array directly tocorresponding corner ports of the target array; aligning ports alongoutside edges of the small array to ports along corresponding outsideedges of the target array, including: along each edge starting fromcorners of the edge, aligning each port of the edge of the small arrayonly once into a corresponding port of the corresponding edge of thetarget array, except for a middle port of the edge of the small arraywhich is aligned into all remaining ports of the corresponding edge ofthe target array.
 17. A method as in claim 15 wherein the port of thetarget array is aligned with the corresponding port of the small arrayin accordance with the following: aligning corner ports of the smallarray directly to corresponding corner ports of the target array;aligning ports along outside edges of the small array to ports alongcorresponding outside edges of the target array, including: along eachedge starting from corners of the edge, aligning each port of the edgeof the small array only once into a corresponding port of thecorresponding edge of the target array, except for a middle port of theedge of the small array which is aligned into all remaining ports of thecorresponding edge of the target array; and aligning ports in rows ofthe small array to ports in corresponding rows of the target array,including: along each row of the target array, aligning each port of therow of the small array only once into a corresponding port of thecorresponding row of the target array, except for a middle port of therow of the small array which is aligned into all remaining ports of thecorresponding row of the target array, wherein each row of the targetarray corresponds to a row of the small array when end row ports fromthe small array have already been mapped into row end ports of thecorresponding target array.
 18. A method as in claim 15 wherein the portof the target array is aligned with the corresponding port of the smallarray in accordance with the following: aligning corner ports of thesmall array directly to corresponding corner ports of the target array;aligning ports along outside edges of the small array to ports alongcorresponding outside edges of the target array, including: along eachedge starting from corners of the edge, aligning each port of the edgeof the small array only once into a corresponding port of thecorresponding edge of the target array, except for a middle port of theedge of the small array which is aligned into all remaining ports of thecorresponding edge of the target array; and aligning ports in columns ofthe small array to ports in corresponding columns of the target array,including: along each column of the target array, aligning each port ofthe column of the small array only once into a corresponding port of thecorresponding column of the target array, except for a middle port ofthe column of the small array which is mapped into all remaining portsof the corresponding column of the target array, wherein each column ofthe target array corresponds to a column of the small array when endcolumn ports from the small array have already been mapped into columnend ports of the corresponding target array.
 19. A method as in claim 15wherein each port of the target array is aligned with the correspondingport of the small array so that a middle of the small array is alignedover the port and if any of the ports of the small array are locatedoutside edges of the target array, a location of the small array isshifted until the small array is completely within the large array. 20.A method as in claim 11 wherein the small array has an odd number ofrows and an odd number of columns.